(1). Field of the Invention
The present invention relates to a carrier reproducing circuit, and more particularly to a carrier reproducing circuit for a multi-valued quadrature amplitude modulation system in which normal signal points are located in a non-square pattern in a phase-amplitude signal space known as a constellation plot.
QAM (Quadrature Amplitude Modulation) systems in which normal signal points are located in a square pattern in a phase-amplitude signal space include 4PSK, 16QAM, 64QAM, and 256QAM systems, whereas QAM systems in which normal signal points are located in a non-square pattern in a phase-amplitude signal space include 32QAM, 128QAM, and 512QAM systems.
(2). Description of the Related Art
One conventional carrier reproducing circuit for a QAM system in which normal signal points are located in a square pattern in a phase-amplitude signal space or a constellation plot has been proposed in Japanese patent application No. 7-60713 filed by the applicant of the present application. According to the proposed conventional carrier reproducing circuit, four regions are established respectively around four signal points at the four corners of the square pattern in the phase-amplitude signal space. When a baseband signal is out of phase, a phase error is determined from positions where the baseband signal was present, and the baseband signal is synchronized or brought into phase based on the determined phase error. Details of the conventional carrier reproducing circuit will be described below.
FIG. 16 of the accompanying drawings shows in block form a conventional QAM radio receiver. As shown in FIG. 16, the radio receiver has a quadrature demodulator 11 comprising two mixers and a 90.degree. phase shifter. The quadrature demodulator 11 demodulates an inputted modulated wave with a reproduced carrier from a voltage-controlled oscillator 21, and outputs an I-channel signal and a Q-channel signal. The I-channel signal and the Q-channel signal are processed by respective rolloff filters 12, 13, respective A/D converters 14, 15, and a waveform equalizer 16, which outputs a baseband signal. A phase error decision circuit 17 compares the position of the baseband signal in a phase-amplitude signal space which is defined by a horizontal axis represented by the amplitude of the I-channel signal and a vertical axis represented by the amplitude of the Q-channel signal, with given signals, e.g., signals on 16 grid points in a 4.times.4 matrix for 16QAM, to detect a phase error, and outputs a 2-bit phase error signal.
FIG. 17 of the accompanying drawings shows the phase error decision circuit 17 in detail. As shown in FIG. 17, the phase error decision circuit 17 comprises two exclusive-OR gates 17a, 17b. The exclusive-OR gate 17a is supplied with most significant bits of a Q-channel polarity signal and an I-channel error signal, and the exclusive-OR gate 17b is supplied with most significant bits of an I-channel polarity signal and a Q-channel error signal. In a 16QAM phase-amplitude signal space shown in FIG. 18 of the accompanying drawings (signal positions are indicated by "x"), if the value of an inputted baseband signal is positioned at a point A, for example, then each of the I-channel polarity signal and the Q-channel polarity signal is "1". Since the point A is on the right side of a signal point P1 which is at the center of a region RO which is surrounded with a thick line, the most significant bit of the I-channel error signal is "1", and also since the point A is lower than the signal point P1, the most significant bit of the Q-channel error signal is "0". Therefore, the exclusive-OR gate 17a outputs a signal "0", and the exclusive-OR gate 17b outputs a signal "1".
In FIG. 16, when the baseband signal is out of phase, a region decision circuit 18 decides, based on the value of the baseband signal, whether the baseband signal is present in a predetermined region in the phase-amplitude signal space or not. If the baseband signal is present in the predetermined region in the phase-amplitude signal space, then the region decision circuit 18 outputs a decision signal indicating that the baseband signal can be synchronized to a selecting circuit 19. If the baseband signal is not present in the predetermined region in the phase-amplitude signal space, then the region decision circuit 18 outputs a decision signal indicating that the baseband signal cannot be synchronized to the selecting circuit 19. The decision circuit 18 does not make any decision when the baseband signal is in phase. As shown in FIG. 19 of the accompanying drawings, the predetermined region comprises four small regions R1.about.R4 extending around respective four signal points that are farthest from the origin in the phase-amplitude signal space.
In FIG. 16, when the baseband signal is in phase, the selecting circuit 19 supplies an output signal from the phase error decision circuit 17 to an integrating circuit 20 at all times. When the baseband signal is out of phase, the selecting circuit 19 supplies an output signal from the phase error decision circuit 17 to the integrating circuit 20 in response to a region decision signal from the region decision circuit 18, indicating that the baseband signal can be synchronized, and the selecting circuit 19 supplies a preceding output signal from the phase error decision circuit 17 to the integrating circuit 20 in response to a region decision signal from the region decision circuit 18, indicating that the baseband signal cannot be synchronized.
FIG. 20 of the accompanying drawings shows an internal structure of the selecting circuit 19 in detail. As shown in FIG. 20, the selecting circuit 19 comprises two D flip-flops 19a, 19b having respective D terminals supplied with an error decision signal from the phase error decision circuit 17, and respective CK terminals supplied with a decision signal from the region decision circuit 18. When the baseband signal is in phase, the region decision circuit 18 supplies a signal "1" to the CK terminals of the D flip-flops 19a, 19b each time a baseband signal is applied. When the baseband signal is out of phase, the region decision circuit 18 supplies a region decision signal "1" to the CK terminals of the D flip-flops 19a, 19b only if the baseband signal is present in the predetermined region.
In FIG. 16, the integrating circuit 20 generates a control signal for the voltage-controlled oscillator 21 based on a phase error signal from the selecting circuit 19.
FIG. 21 of the accompanying drawings shows an internal structure of the integrating circuit 20 in detail. As shown in FIG. 21, the integrating circuit 20 comprises a differential amplifier 20a, a comparator 20b, and a lag-lead filter 20c. Operation of the integrating circuit 20 at the time the baseband signal is in phase will be described with reference to FIG. 18. If the value of an inputted baseband signal is positioned at the point A, for example, the exclusive-OR gate 17a outputs a signal "0", and the exclusive-OR gate 17b outputs a signal "1", as described above. Therefore, an inverting terminal (-) of the differential amplifier 20a is supplied with a phase error signal "0", and a noninverting terminal (+) of the differential amplifier 20a is supplied with a phase error signal "1". The comparator 20b outputs a signal "1". If the comparator 20b outputs a signal "1" with respect to the value of a subsequently inputted baseband signal, then the lag-lead filter 20c outputs, to the voltage-controlled oscillator 21, a control signal having a control voltage for rotating the baseband signal counterclockwise (in a positive direction +), e.g., bringing the point A of the baseband signal closer to the signal point P1.
When the baseband signal is out of phase, the baseband signal is rotated in the phase-amplitude signal space as shown in FIG. 22 of the accompanying drawings. If the baseband signal is present in the predetermined region composed of the small regions R1.about.R4 under such conditions, the integrating circuit 20 outputs the same control signal to the voltage-controlled oscillator 21 as when the baseband signal is in phase as described above. If the baseband signal is present outside of the predetermined region, then the integrating circuit 20 outputs the same control signal to the voltage-controlled oscillator 21 as the preceding control signal. Specifically, when the baseband signal is rotating counterclockwise (in the positive direction +), the integrating circuit 20 outputs a control signal for rotating the baseband signal clockwise (in a negative direction -) to the voltage-controlled oscillator 21 even though the baseband signal goes away from any of the small regions R1.about.R4. When the baseband signal is rotating clockwise (in the negative direction -), the integrating circuit 20 outputs a control signal for rotating the baseband signal counterclockwise (in the positive direction +) to the voltage-controlled oscillator 21 even though the baseband signal goes away from any of the small regions R1.about.R4. Accordingly, the baseband signal which is to stay still at the signal points at the four corners of the square pattern in the phase-amplitude signal space is shifted to a corresponding signal point, thus completing baseband signal synchronization.
In a QAM system in which normal signal points are located in a non-square pattern in a phase-amplitude signal space, however, since there are no signal points at the four corners in the phase-amplitude signal space, the conventional QAM radio receiver cannot determine a phase error when a baseband signal is not synchronized, and hence can not bring the baseband signal into synchronization.